In digital communications, different modulation techniques can be used to modulate digital information onto a carrier signal. In a demodulator of a receiver, a clock signal is recovered from a received signal, so that the received signal is sampled by the recovered clock signal to retrieve digital data. Therefore, clock recovery is a critical function of a digital communications system in order to obtain accurate symbol identification.
A number of existing clock recovery methods focus on taking averages of “zero crossing” positions of a received signal over a large number of samples. Essentially, the receiver detects the change of polarity of the received signal and compares its location with predicted sampling points. If the change of the polarity occurs in the middle of two sampling points, the predicted sampling instant is deemed correct. However, if the change of polarity does not occur in the middle, the reconstructed clock will be altered accordingly.
However, it is noted that in short or noisy signals the averages of the zero crossings may not be sufficiently accurate. This is due to the small number of crossings or spurious noise crossings that result in incorrect point selection and poor data error rates.
Furthermore, it is also noted that there are other existing clock recovery methods that do not perform well with four-level modulation schemes. Generally, these methods utilise a training sequence to improve convergence, which is not practical for short signals.
It is thus desirable to provide a method of performing clock recovery to recover the data sampling clock from short and noisy signals.